computer over a single interleaved SDLC link. But what would you put on those
The tradeoff is complexity. The microcode must be carefully arranged so that the instructions in delay slots are either useful setup for both paths, or at least harmless if the redirect fires. Not every case is as clean as RETF. When a PLA redirect interrupts an LCALL, the return address is already pushed onto the microcode call stack (yes, the 386 has a microcode call stack) -- the redirected code must account for this stale entry. When multiple protection tests overlap, or when a redirect fires during a delay slot of another jump, the control flow becomes hard to reason about. During the FPGA core implementation, protection delay slot interactions were consistently the most difficult bugs to track down.
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There's lots of Moon on display tonight, so plenty of opportunity to do some Moon gazing. With just your naked eye, you'll be able to see the Mares Tranquillitatis, Vaporum and Serenitatis. With binoculars you'll also be able to see the Mare Nectaris, and the Alphonsus and Endymion Craters, and with a telescope you'll see also see he Apollo 16 and 11 landing spots, and the Rupes Altai.
let offset = pixel + (value - 0.5) * (1.0 / number of levels)